It is necessary that each element of an integrated circuit formed on a silicon substrate be electrically isolated. Recently, technologies for reducing the width of isolation regions and for reducing element size have been developed in the advancement of highly integrated semiconductor devices. Competition among semiconductor manufacturers is focusing efforts in the field of isolation techniques.
In the initial stages of the semiconductor industry, bipolar integrated circuits were mainstream. Accordingly, a junction isolation technique for isolating the bipolar integrated circuit was invented. This junction isolation technique was very simple, but had certain drawbacks; namely, that the isolation region was too large and therefore caused large parasitic capacitance, degrading the speed and performance of the circuit.
Metal Oxide Semiconductor (MOS) transistors were also developed. A MOS transistor has an entirely different structure from that of a bipolar transistor, necessitating a different isolation structure. Because of this, the LOCOS technique was developed, forming a semi-recessed oxide in the nonactive area (field area or isolation region) of the semiconductor substrate.
The LOCOS technique has been widely used because of its advantageous properties of decreased junction capacitance, decreased parasitic effects, self-alignment processing, and less lateral expansion when compared to the conventional junction isolation technique. However, according to a conventional LOCOS method, the field oxide greatly encroaches on the active area and thus forms a large bird's beak structure, in turn causing an uneven surface which is inadequate for applying sub-micron lithography techniques. Defects therefore occur due to long periods of oxidation, causing impurities to be redistributed.
A number of modified LOCOS methods were proposed to overcome these defects. For example: 1) a method for forming a field oxide layer by oxidizing a recessed portion of the substrate; 2) an etched-back LOCOS method in which a portion of the field oxide layer is etched back after the field oxide has been grown, thereby reducing the bird's beak and obtaining a more planarized surface; 3) a poly-buffered LOCOS method in which a poly-buffer pad film (50 nm of polysilicon and 5-10 nm of oxide film) and a thick nitride film (100-240 nm) are used instead of the conventional pad oxide film; 4) a sealed-interface local oxidation (SILO) method in which a silicon nitride layer is directly formed on the silicon substrate before forming the pad oxide layer thereon; and 5) a sidewall-masked isolation technique (SWAMI) in which a sidewall mask is used to reduce the bird's beak. In addition, some isolation methods have been proposed whereby the semiconductor substrate is not oxidized, for example trench isolation and selective epitaxial growth, but these methods have apparently not yet been put to practical use.
Among the above modified LOCOS techniques, the poly-buffered LOCOS technique is drawing attention as an isolation technique for DRAM devices because of its good control of bird's beak, which thereby minimizes the stress related to junction leakage. The poly-buffered LOCOS technique is also called selective polysilicon oxidation (SEPOX) because a field oxide film is formed by selectively oxidizing polysilicon. This SEPOX technique is detailed in a paper entitled "A 0.5 .mu.m Isolation Technology Using Advanced Polysilicon Pad LOCOS (APPL)," by T. Nishihara et al. (IEDM 1988, pp 100-103).
FIG. 1 through FIG. 4 are sectional views for illustrating the conventional SEPOX technique mentioned above.
FIG. 1 illustrates the step of forming a buffer layer 5 and a silicon nitride layer 7 having an opening 9 defining an isolation region. Referring to FIG. 1, a thin pad oxide film 3 is formed on a semiconductor substrate 1 by thermal oxidation, and then a buffer layer 5 is formed on the pad oxide film 3. Buffer layer 5 relieves the stress caused by the bulk expansion which occurs when a field oxide layer is formed for element isolation. Buffer layer 5 is formed by the deposition of a polycrystalline or an amorphous silicon. Then, a silicon nitride layer 7 is formed by depositing a nitride silicon on buffer layer 5, and a photoresist film is formed by coating a photoresist on silicon nitride film 7. The thus-formed photoresist film is then exposed, using a photomask, and then developed to thereby form a photoresist pattern (not shown) with an opening 9 defining the isolation region. Next, the opening 9 is formed by etching the silicon nitride film 7 using the above photoresist pattern as an etching mask, and the remaining photoresist pattern is stripped away.
FIG. 2 illustrates the step of implanting ions to form a channel-stop layer. Ions 10 are implanted via opening 9 into the surface portion of the semiconductor substrate 1, in order to form a channel-stop layer for preventing field inversion. Reference numeral 10' shows the implanted ions in the surface portion of semiconductor substrate 1.
FIG. 3 illustrates the step of forming a field oxide layer 11. A field oxide layer 11 is formed by partially oxidizing the exposed area of the buffer layer 5, along with the surface portion of the semiconductor substrate 1 which is defined by opening 9.
FIG. 4 illustrates the step of removal of the silicon nitride film 7 and buffer layer 5 by a conventional method.
According to the above SEPOX technique, buffer layer 5 is subject to an oxidation stress caused by bulk expansion which occurs when the field oxide layer is formed. After forming the field oxide layer 11, the portion where significant stress has been applied in the oxidation process is removed, thereby reducing the stress due to the oxidation in the active region where the elements are to be formed. This prevents failures which might be caused by leakage current.
The conventional SEPOX technique has drawbacks. For instance, it generates two bird's beaks due to the diffusion speed difference of an oxidant. FIG. 5 is an enlarged sectional view of a field oxide layer 11. A first bird's beak (FBB) is generated between the buffer layer 5 and the semiconductor substrate 1. A second bird's beak (SBB) is generated between the buffer layer 5 and the silicon nitride layer 7. When a semiconductor wafer is exposed to the atmosphere after the formation of the polysilicon layer such as buffer layer 5, native oxide grows on the polysilicon layer. Oxidant diffusion is faster in this native oxide than in the polysilicon layer, resulting in the formation of the second bird's beak SBB.
As the second bird's beak becomes larger, the polysilicon between the first and second bird's beak becomes more difficult to remove. In addition, if the second bird's beak is excessively large, and the active region is small, the second bird's beak may become connected to the second bird's beak of an adjacent field oxide layer, thereby covering the polysilicon layer which remains. This is called a second bird's beak encroachment and is shown in FIG. 6.
Referring to FIG. 6, a second bird's beak of two adjacent field oxide layers 11a and 11b each grow to meet in the lower part of silicon nitride layer 7, which then covers the remaining polysilicon 5'. In this situation, the covered polysilicon 5' remains in the active region because it is not removed in a subsequent step. For this reason, the SEPOX technique is difficult to use where the width of an active region is narrow. Also, the width of an isolation region becomes narrower than that of the field oxide layer, resulting in the decrease of punch-through margin.
Further, the width of an isolation region is limited by the width of a photoresist pattern, and therefore, the formation of an isolation region below the optical resolution of the photoresist pattern is therefore impossible. Since a photoresist pattern deforms spatially, when oxidation occurs after patterning the silicon nitride film using the deformed photoresist pattern, adjacent field oxide layers meet each other because of bird's beak, as shown in FIG. 6.
Meanwhile, the depth of the isolation region becomes shallow due to the existence of the buffer layer, since the buffer layer is oxidized prior to the oxidation of the semiconductor substrate.
If the thickness of the polysilicon layer increases, the length of the bird's beak increases, relaxing the stress. Accordingly, as the polysilicon thickness increases, the leakage current decreases because the relaxed stress decreases damage to the substrate, but the bird's beak length increases causing bird's beak encroachment, so that uniformity cannot be controlled.
A number of modified SEPOX techniques have been proposed to solve the problems of the conventional techniques. For example, Japanese Patent Laid-open Publication No. hei 1-98246 by Kazuyoshi Kobayashi discloses a method of: (i) removing part of a surface of an exposed polysilicon, (ii) superimposing a silicon oxide layer on a silicon nitride film, and (iii) using the composite layer (silicon nitride and silicon oxide film) as an anti-oxidative layer in order to decrease the size of the bird's beak. Removing part of the polysilicon in this manner suppresses the bird's beak growth, thereby forming a small field oxide layer. However, the above polysilicon is anisotropically etched such that its etched edge is about 90 degrees with respect to its surface. Here, performing an oxidation process to form a field oxide layer creates an edge at which stresses are focused, thereby causing increased leakage current.
U.S. Pat. No. 4,897,364 by Nguyen et al. discloses a method of decreasing the length of bird's beak using a sidewall spacer comprised of nitride silicon. However, a small aperture which is further decreased in size with a sidewall spacer has poor isolation characteristics because of an insufficient growth of the field oxide layer.
A paper entitled "Poly-Buffer Recessed LOCOS Process for 256 Mbit DRAM Cells" by N. Shimizu et al. (IDEM 92, pp 279-282) discloses a method for preventing punch-through of the field oxide layer. Here, an exposed portion of a polysilicon layer and the surface portion of a semiconductor substrate are partially removed to thereby form a trench (a recessed portion or groove) and then an exposed side of a stress-relief oxide is selectively etched to form lateral undercuts. After oxidizing the exposed silicon substrate and the inside of the undercuts, a thin silicon nitride film is formed on the inner wall of the trench. Thereafter, a recessed field oxide layer is thermally grown in the trench.
W. S. Paik et al. (see "International Symposium on VLSI Technology, Systems and Applications, " May 22-24, 1991 pp. 38-42) suggests a method of preventing a second bird's beak encroachment using a spacer made of polysilicon.
However, even using the above mentioned conventional SEPOX techniques, it is still difficult to manufacture a small field oxide layer because of the limitations of optical resolution, and it is also difficult to manufacture a field oxide layer having good isolation characteristics and low leakage current.